Electronic devices have become smaller and more powerful in order to meet consumer needs and to improve portability and convenience. Consumers have become dependent upon electronic devices and have come to expect increased functionality. Some examples of electronic devices include desktop computers, laptop computers, cellular phones, smart phones, media players, integrated circuits, etc.
Some electronic devices are used for processing and/or displaying digital media. For example, portable electronic devices now allow for digital media to be produced and/or consumed at almost any location where a consumer may be. Furthermore, some electronic devices may provide download or streaming of digital media content for the use and enjoyment of a consumer.
Digital video is typically represented as a series of images or frames, each of which contains an array of pixels. Each pixel includes information, such as intensity and/or color information. In many cases, each pixel is represented as a set of three colors, each of which is defined by eight bit color values.
Some video coding techniques provide higher coding efficiency at the expense of increasing complexity. Increasing image quality requirements and increasing image resolution requirements for video coding techniques also increase the coding complexity. Video decoders that are suitable for parallel decoding may improve the speed of the decoding process and reduce memory requirements; video encoders that are suitable for parallel encoding may improve the speed of the encoding process and reduce memory requirements.
The increasing popularity of digital media has presented several problems. or example, efficiently representing high-quality digital media for storage, transmittal, and playback presents several challenges. systems and methods that represent digital media more efficiently is beneficial.
The foregoing and other objectives, features, and advantages of the invention will be more readily understood upon consideration of the following detailed description of the invention, taken in conjunction with the accompanying drawings.
The present invention relates to image and video decoding at higher bit depths.
Existing video coding standards, such as H.264/AVC, high efficiency video coding (HEVC), generally provide relatively high coding efficiency at the expense of increased computational complexity. As the computational complexity increases, the encoding and/or decoding speeds tend to decrease. Also, the desire for increased higher fidelity tends to increase over time which tends to require increasingly larger memory requirements, increasingly larger memory bandwidth requirements, and increasing hardware complexity. The increasing memory requirements and the increasing memory bandwidth requirements tends to result in increasingly more expensive and computationally complex circuitry, especially in the case of embedded systems.
Referring to FIG. 22, many decoders (and encoders) receive (and encoders provide) encoded data for blocks of an image. Typically, the image is divided into blocks and each of the blocks is encoded in some manner, such as using a discrete cosine transform (DCT), and provided to the decoder. The decoder receives the encoded blocks and decodes each of the blocks in some manner, such as using an inverse discrete cosine transform. In many cases, the decoding of the image coefficients of the image block is accomplished by matrix multiplication. The matrix multiplication may be performed for a vertical direction and the matrix multiplication may be performed for a horizontal direction. By way of example, for 8-bit values, the first matrix multiplication can result in 16-bit values, and the second matrix multiplication can result in 24-bit values in some cases. In addition, the encoding of each block of the image is typically quantized, which maps the values of the encoding to a smaller set of quantized coefficients. Quantization requires de-quantization by the decoder, which maps the set of quantized coefficients to approximate encoding values or de-quantized coefficients. The number of desirable bits for de-quantized coefficients is a design parameter. The potential for large de-quantized coefficient values resulting from the matrix multiplication and the de-quantization operation is problematic for resource constrained systems, especially embedded systems.